UVM testbench architecture and verification methodology for SystemVerilog. Use when creating UVM tests, agents, drivers, monitors, sequences, or scoreboards.
0
AI 78
mcp-workflow
MameMame7771/23/2026
FastMCP + DSIM workflow for UVM test execution. Use when compiling tests, running simulations, executing regression suites, or troubleshooting MCP integration.
0
AI 72
typescript-vscode-extension
MameMame7772/1/2026
VS Code extension development patterns in TypeScript. Use when creating extensions, registering commands, implementing providers, building webviews, or testing VS Code extensions.
0
AI 96
typescript-vscode-extension
MameMame7772/7/2026
VS Code extension development patterns in TypeScript. Use when creating extensions, registering commands, implementing providers, building webviews, or testing VS Code extensions.
